Information in digital telecommunication networks is transmitted and received at well-defined and precise bit rates, which are based on precise frequency sources. A node within the telecommunication network having direct access to these precise frequency sources may transmit information in the form of digital signals at very precise rates. However, many nodes do not have direct access to the precise frequency sources. These nodes recover an input clock from the incoming digital signal at the node. The recovered clock serves as a reference signal for disciplining an output clock signal. The disciplined output clock signal is subsequently used to synchronize transmission from the node. If one reference signal at a node becomes unusable, another reference signal, or reference, available at the node may be used in its place, providing robustness to the telecommunication network.
While the reference signals possess the excellent long-term frequency stability of the precise frequency source upon which the reference is based, the short-term frequency stability may be degraded as a result of transmission through the telecommunication network. At present, phase feedback servo loops are employed to reduce momentary degradations in frequency stability in an effort to generate a clock signal having both excellent long-term and short-term frequency stability.
An example of a feedback servo loop is the simple phase lock loop (PLL). In the simple PLL, an output signal produced by a frequency tunable oscillator is fed back for phase comparison to a reference input. The phase difference resulting from the phase comparison is processed and then used to tune the frequency of the oscillator such that the phase difference between the reference input and the output signal is nulled. In the steady state, or locked condition of the PLL, the reference input and the oscillator signal are phase aligned and are at the same frequency.
Other phase feedback servo loops are variations of the simple PLL. One example of such a phase feedback servo loop for disciplining an output (clock) signal by a reference input is taught by Scordo in U.S. Pat. No. 4,633,193. As in any phase feedback servo loop, the output signal is fed back within the loop. Iterative computation based on the present input and the past output signal produces a present output signal. Two oscillators are used. The first oscillator acts as a common phase reference for both the reference input and the output signal. The second oscillator is a tunable oscillator used to provide the output signal. A digital-to-analog converter produces an analog voltage for tuning the second oscillator based on the result of the iterative computation by integrators and summers.
Lesea in U.S. Pat. No. 4,947,382 teaches another method of disciplining a clock signal by a reference input based on phase feedback. Phase comparison takes place between the reference input and a synthesized output. The phase difference based on the phase comparison, is fed back to modify a synthesizer which produces the output signal. As with any feedback system, the output is used for its own synthesis.
In feedback servo loops, the output is fed back within the loop for comparison against a reference input to generate correction information, which is used to refine the output in an iterative manner. In telecommunication networks, in which there may be multiple reference inputs and only one output, the single output is dedicated to only one reference input for iteration, completing only one feedback loop. Thus, loops using other of the multiple reference inputs are incomplete. Switching from one reference to another requires completing an incomplete loop and bringing the newly completed loop to its final steady state. Loop transients generally result from such reference input switching.
Loop transients produce extraneous frequency and phase variations in the output (clock) signal which are not related to the reference inputs. Frequency and phase variations in the clock signal affect transmission to other nodes in the telecommunication network which sense the variations in the clock signal, and as a result, switch to another of the multiple references available at the node. The switching of that reference in turn, induces additional extraneous frequency and phase variations in its generated clock signal, and so on. The successive reference input switching and the loop transients that result, cause the overall performance of the telecommunication network to degrade.